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How Do Registers Work In Assembly

Associates - Registers


Processor operations by and large involve processing information. This data tin can be stored in memory and accessed from thereon. However, reading data from and storing data into memory slows down the processor, as it involves complicated processes of sending the data request across the control charabanc and into the retentiveness storage unit and getting the data through the same channel.

To speed up the processor operations, the processor includes some internal memory storage locations, chosen registers.

The registers shop data elements for processing without having to access the retentivity. A limited number of registers are congenital into the processor chip.

Processor Registers

There are 10 32-fleck and vi 16-fleck processor registers in IA-32 compages. The registers are grouped into 3 categories −

  • General registers,
  • Command registers, and
  • Segment registers.

The general registers are further divided into the following groups −

  • Data registers,
  • Arrow registers, and
  • Index registers.

Data Registers

Four 32-bit data registers are used for arithmetic, logical, and other operations. These 32-bit registers tin can be used in three ways −

  • Equally complete 32-bit information registers: EAX, EBX, ECX, EDX.

  • Lower halves of the 32-bit registers can be used every bit 4 16-bit data registers: AX, BX, CX and DX.

  • Lower and college halves of the above-mentioned four 16-scrap registers can be used as viii viii-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Data Registers

Some of these information registers take specific employ in arithmetical operations.

AX is the principal accumulator; information technology is used in input/output and most arithmetics instructions. For case, in multiplication functioning, one operand is stored in EAX or AX or AL register according to the size of the operand.

BX is known as the base register, every bit it could be used in indexed addressing.

CX is known as the count register, as the ECX, CX registers store the loop count in iterative operations.

DX is known as the information register. Information technology is also used in input/output operations. It is as well used with AX annals forth with DX for multiply and divide operations involving large values.

Pointer Registers

The arrow registers are 32-fleck EIP, ESP, and EBP registers and respective 16-bit right portions IP, SP, and BP. At that place are three categories of arrow registers −

  • Education Pointer (IP) − The sixteen-bit IP annals stores the offset address of the adjacent instruction to be executed. IP in association with the CS annals (as CS:IP) gives the complete accost of the electric current didactics in the code segment.

  • Stack Pointer (SP) − The 16-chip SP register provides the offset value within the program stack. SP in association with the SS register (SS:SP) refers to be current position of information or address within the program stack.

  • Base Pointer (BP) − The 16-fleck BP annals mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to become the location of the parameter. BP can too be combined with DI and SI as base of operations annals for special addressing.

Pointer Registers

Alphabetize Registers

The 32-bit alphabetize registers, ESI and EDI, and their 16-bit rightmost portions. SI and DI, are used for indexed addressing and sometimes used in addition and subtraction. There are 2 sets of index pointers −

  • Source Index (SI) − It is used every bit source index for cord operations.

  • Destination Index (DI) − It is used as destination index for string operations.

Index Registers

Control Registers

The 32-bit instruction pointer register and the 32-fleck flags annals combined are considered as the command registers.

Many instructions involve comparisons and mathematical calculations and change the condition of the flags and some other provisional instructions examination the value of these condition flags to take the control menstruation to other location.

The common flag $.25 are:

  • Overflow Flag (OF) − Information technology indicates the overflow of a high-order fleck (leftmost bit) of data after a signed arithmetic performance.

  • Management Flag (DF) − It determines left or right direction for moving or comparison string data. When the DF value is 0, the cord functioning takes left-to-right direction and when the value is set to 1, the string operation takes correct-to-left direction.

  • Interrupt Flag (IF) − It determines whether the external interrupts like keyboard entry, etc., are to be ignored or processed. It disables the external interrupt when the value is 0 and enables interrupts when gear up to 1.

  • Trap Flag (TF) − Information technology allows setting the operation of the processor in single-footstep way. The DEBUG program nosotros used sets the trap flag, so we could footstep through the execution 1 educational activity at a time.

  • Sign Flag (SF) − It shows the sign of the result of an arithmetic operation. This flag is set co-ordinate to the sign of a data item following the arithmetic performance. The sign is indicated by the high-order of leftmost fleck. A positive result clears the value of SF to 0 and negative result sets it to i.

  • Zero Flag (ZF) − It indicates the result of an arithmetic or comparison functioning. A nonzero result clears the zilch flag to 0, and a zero consequence sets it to 1.

  • Auxiliary Carry Flag (AF) − It contains the bear from scrap 3 to flake iv following an arithmetics operation; used for specialized arithmetics. The AF is set when a 1-byte arithmetic functioning causes a carry from bit three into scrap 4.

  • Parity Flag (PF) − Information technology indicates the total number of one-$.25 in the effect obtained from an arithmetic operation. An even number of 1-bits clears the parity flag to 0 and an odd number of i-bits sets the parity flag to one.

  • Carry Flag (CF) − It contains the carry of 0 or 1 from a high-society bit (leftmost) after an arithmetics performance. It also stores the contents of last chip of a shift or rotate operation.

The post-obit table indicates the position of flag $.25 in the sixteen-bit Flags register:

Flag: O D I T South Z A P C
Bit no: 15 14 thirteen 12 eleven 10 9 8 7 6 5 4 three 2 one 0

Segment Registers

Segments are specific areas defined in a program for containing data, lawmaking and stack. There are three main segments −

  • Lawmaking Segment − It contains all the instructions to be executed. A 16-bit Code Segment register or CS register stores the starting accost of the code segment.

  • Data Segment − It contains data, constants and work areas. A xvi-chip Data Segment register or DS annals stores the starting accost of the data segment.

  • Stack Segment − It contains information and return addresses of procedures or subroutines. Information technology is implemented as a 'stack' data construction. The Stack Segment register or SS register stores the starting address of the stack.

Apart from the DS, CS and SS registers, there are other actress segment registers - ES (actress segment), FS and GS, which provide boosted segments for storing data.

In assembly programming, a program needs to access the memory locations. All retentivity locations inside a segment are relative to the starting address of the segment. A segment begins in an address evenly divisible by xvi or hexadecimal 10. So, the rightmost hex digit in all such retentiveness addresses is 0, which is not generally stored in the segment registers.

The segment registers stores the starting addresses of a segment. To become the exact location of data or instruction within a segment, an offset value (or displacement) is required. To reference any retention location in a segment, the processor combines the segment address in the segment register with the beginning value of the location.

Example

Await at the post-obit simple program to empathize the use of registers in assembly programming. This program displays 9 stars on the screen along with a simple message −

section	.text    global _start	 ;must be declared for linker (gcc) 	 _start:	         ;tell linker entry point    mov	edx,len  ;message length    mov	ecx,msg  ;message to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,4    ;system phone call number (sys_write)    int	0x80     ;phone call kernel 	    mov	edx,9    ;bulletin length    mov	ecx,s2   ;message to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,four    ;arrangement call number (sys_write)    int	0x80     ;telephone call kernel 	    mov	eax,1    ;system call number (sys_exit)    int	0x80     ;call kernel 	 section	.data msg db 'Displaying ix stars',0xa ;a message len equ $ - msg  ;length of message s2 times 9 db '*'        

When the higher up code is compiled and executed, it produces the following result −

Displaying ix stars *********        

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Source: https://www.tutorialspoint.com/assembly_programming/assembly_registers.htm#:~:text=To%20speed%20up%20the%20processor,built%20into%20the%20processor%20chip.

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